1. Field
This disclosure relates generally to semiconductors, and more specifically, to a process for manufacturing a semiconductor data storage device.
2. Related Art
The challenge of forming electronic devices continues to increase as more functionality is put into a smaller area. From a cross-sectional view, the aspect ratio of gate electrode structures continues to increase with successive generations of electronic devices. Taller, thinner structures are more fragile and therefore more likely to be damaged during subsequent processing than structures with a lower aspect ratio or that are thicker. For example, when etching of layers above a source and a drain of a transistor occurs, the etching may remove more material than is desired. For small geometry transistors, the conventional etch processes may actually inadvertently remove portions of a source and a drain when it is desired to only remove an overlying layer of material, such as an overlying gate sidewall spacer. This inadvertent etching of the source and drain results in a pitted transistor structure in which the electrical properties of the transistor structure are significantly degraded. Conventional etch chemistries can readily damage other transistor elements such as undercutting a gate oxide. In addition to altering the electrical integrity of a transistor, gate oxide undercutting can also result in the lifting off of the entire gate structure during subsequent processing. Thus the increased miniaturization of semiconductor dimensions has created additional problems which are not present at larger device geometries.